学习入门
芯片制造工艺问答033：说明Gate oxide quality (integrity)如何量度? 解释不同方法的优缺点 (Vbd, Qbd, )
Ans Vbd: pattern 2000×2000um2, die no=72ea, Vbd>= 8V for oxidethickness 70A, Vbd>=12V for oxide thickness 115A. Vbd>=6.5V, pass orVbd<=2.5V, mode A failure, 2.5V < Vbd< 6.5V, B mo
芯片制造工艺问答034：解释名词, PHO proximity effect, Swing effect, Exposure latitude, Best Focus.
Ans Pho proximity effect: (近接效应)Optical proximity effect is a nature result of the optical interference,diffraction effects. Because diffraction nature of incident lights, it’simpossible to elimin
芯片制造工艺问答035： Lot to lot, within lot wafer to wafer, within wafer, within field.
Ans (1) lot to lot :不同lot之间的差异性, due to EQ, material, environmental shift(2) within lot waferto wafer:同一个lot中,不同wafer之间的差异性, due to batch run conditional shift. E.g. Lensheating, CVD film thicknes
芯片制造工艺问答036：PHO Overlay shift的原因及现象有哪些? 其中有多少种可以经由给机台补偿改善?
Ans (1) phenomenon:translation, rotation and magnitude, trapezoid, tilt (2) reason: as belowtabler 平移 旋转 水平 扭曲 倍率 X, Y large mean, small range
芯片制造工艺问答037：PHO recipe的Focus设定值往正"+"调整后PR profile会有何影响?
Ans positive: 往正调整会造成所谓的”削头”的情形,如下图所示 negative:往负调整会造成所谓的”解不开”的情形,如下图所示
